The 74HC595 are high-speed Si-gate CMOS devices and are pin-compatible with low power Schottky TTL (LSTTL). They are specified in compliance with JEDEC.
The 74HC595D SMD IC is an 8-stage serial shift register with a storage register and 3-state outputs. The shift register and storage register have separate clocks. Data is shifted on the positive-going transitions of the SH_CP input. The data in each register is transferred to the storage register on a positive-going transition of the ST_CP input. If both clocks are connected together, the shift register will always be one clock pulse ahead of the storage register.
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